In writing data in a multi-value storage type flash memory that stores data of two or more bits in each memory cell, there is a problem such as interference (hereinafter, referred to as a proximity effect) between memory cells. As a countermeasure against this problem, writing data in a memory cell is performed through two or more stages. More particularly, writing data in a memory cell group connected to a word line (hereinafter referred to as a WL) is performed through a plurality of stages, and is performed in a sequence in which the first writing stage is performed with respect to a k-th WL and then a k+1-th WL, and the second writing stage is performed with respect to the k-th WL.
When an error correction code (ECC) is calculated based on data to be written into memory cells using such a writing sequence, there are times at which n error correction codes are being calculated for data being written into memory cells connected to different WLs. In order to accommodate this situation, a random access memory (RAM) or a buffer with a size capable of simultaneously storing both ECC calculation results are necessary.